VLSI Careers

Domains

RTL Design

Register Trasfer Level (RTL) design is involves digital system design using a Harware Description Language (HDL) such as Verilog. A strong background in digital logic design, analytical aptitude and knowledge of Verilog language is required for this domain.

Design Verification (DV)

DV is probably the biggest career market in India. It involves testing of the Verilog RTL designs. In addtion to digital design and Verilog; System Verilog, C programming, UVM and knowledge of Object-Oriented programming is helpful for this domain.

Layout

Layout is what is known as the back-end part of the VLSI Design Flow involving the drwaing of mask sets for final fabrication. Knowledge of CMOS VLSI design along with expertise in layout tools such as Cadence Virtuoso is helpful for this domain. Some specialization fields in Layout are:

  • Analog Layout: Layout of analog circuits. Strong CMOS VLSI knowledge is necessary. Experience in layout for matching, noise improvement is a plus.
  • Standard Cell Layout: Layout of digital primitive cells such as NAND, NOR, FlipFlops, etc.

Process Design Kit (PDK) Developer

PDK are provided by fabrication companies to designers to help them design and create layout masks for final fabrication of ICs. PDK contains IC device simulation models, technology data, Design Rule Check (DRC) rule files, Layout Vs Schematic (LVS) rule files. Knowledge of CMOS VLSI, Fabrication process is a must. Experience with programming language SKILL, Tcl/Tk and SVRF is helpful. There are different sub-domains of PDK including:

  • DRC: involves writing rule files in languages like SVRF and Tcl to check design rules for layout.
  • LVS: involves writing rule files in languages like SVRF and Tcl to check design rules for carrying out layout vs schemtic checks.
  • PCell: develeopers create primitives for schematic and layout using programming languages such as SKILL and Tcl.
  • MSIM: for developing simulation models for a given fabrication technology.

Physical Design Engineer

This another back-end domain of digital design flow with some sub domains:

  • Static Time Analysis (STA): involves doing timing analysis for large degital designs. Strong digital back ground with expertise in doing delay analysis is a big plus.
  • Place and Route (P&R): After a circuit has been sythesized from a RTL description, P&R involves placing and routing all the blocks in the design using industry-standard tools while meeting all area, power and timing specifications.

Analog Circuit Design

Along with good knowledge in CMOS devices and process, candidate should be very strong in circuits and control systems.

Companies

All the top semiconductor companies in the world have design centers in India including:

There are also excellent semiconductor service companies that hire freshers, train them and place them in projects in top semiconductor companies including the ones mentioned above. Some of the semiconductor service companies are: